High performance quaternary logic designs using GNFETs
The implementations of quaternary circuit schematics are presented in this paper. The quaternary logic is a better choice over the conventional logics because it offers high operating speed, reduced chip area and reduced on-chip interconnects. A new method is presented to design quaternary schematic...
Zapisane w:
| Główni autorzy: | , |
|---|---|
| Format: | Artigo |
| Język: | Inglês |
| Wydane: |
Elsevier
2023-09-01
|
| Seria: | e-Prime: Advances in Electrical Engineering, Electronics and Energy |
| Hasła przedmiotowe: | |
| Dostęp online: | http://www.sciencedirect.com/science/article/pii/S277267112300092X |
| Etykiety: |
Nie ma etykietki, Dołącz pierwszą etykiete!
|