High performance quaternary logic designs using GNFETs
The implementations of quaternary circuit schematics are presented in this paper. The quaternary logic is a better choice over the conventional logics because it offers high operating speed, reduced chip area and reduced on-chip interconnects. A new method is presented to design quaternary schematic...
Guardado en:
| Autores principales: | , |
|---|---|
| Formato: | Artigo |
| Lenguaje: | Inglês |
| Publicado: |
Elsevier
2023-09-01
|
| Colección: | e-Prime: Advances in Electrical Engineering, Electronics and Energy |
| Materias: | |
| Acceso en línea: | http://www.sciencedirect.com/science/article/pii/S277267112300092X |
| Etiquetas: |
Sin Etiquetas, Sea el primero en etiquetar este registro!
|
