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High performance quaternary logic designs using GNFETs

The implementations of quaternary circuit schematics are presented in this paper. The quaternary logic is a better choice over the conventional logics because it offers high operating speed, reduced chip area and reduced on-chip interconnects. A new method is presented to design quaternary schematic...

Täydet tiedot

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Bibliografiset tiedot
Päätekijät: Shaik Javid Basha, P. Venkatramana
Aineistotyyppi: Artigo
Kieli:Inglês
Julkaistu: Elsevier 2023-09-01
Sarja:e-Prime: Advances in Electrical Engineering, Electronics and Energy
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Linkit:http://www.sciencedirect.com/science/article/pii/S277267112300092X
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