Design of a JFET and radiation PIN detector integrated on a high resistivity silicon substrate using a high temperature process
In this work, a fabrication process with a PIN diode integrated in a high resistivity silicon wafer is presented. This process uses high temperature thermal treatments to improve the JFET characteristics. Using simulation programs and statistical tools, the contribution of diverse process steps on t...
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| 出版年: | Revista Mexicana de Física |
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| 主要な著者: | , , |
| フォーマット: | Artigo |
| 言語: | Inglês |
| 出版事項: |
Sociedad Mexicana de Física A.C.
2006
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| 主題: | |
| オンライン･アクセス: | https://www.redalyc.org/articulo.oa?id=57028295016 |
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