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Characterizing the electrical properties of raised S/D junctionless thin-film transistors with a dual-gate structure
This letter demonstrates a p-type raised source-and-drain (raised S/D) junctionless thin-film transistors (JL-TFTs) with a dual-gate structure. The raised S/D structure provides a high saturation current (>1 μA/μm). The subthreshold swing (SS) is 100 mV/decade and the drain-induced barrier loweri...
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| Publicado no: | Nanoscale Res Lett |
|---|---|
| Main Authors: | , , , , , , |
| Formato: | Artigo |
| Idioma: | Inglês |
| Publicado em: |
Springer-Verlag
2014
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| Assuntos: | |
| Acesso em linha: | https://ncbi.nlm.nih.gov/pmc/articles/PMC4493839/ https://ncbi.nlm.nih.gov/pubmed/26089001 https://ncbi.nlm.nih.govhttp://dx.doi.org/10.1186/1556-276X-9-669 |
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