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Design and Development of Efficient SRAM Cell Based on FinFET for Low Power Memory Applications

Stationary random-access memory (SRAM) undergoes an expansion stage, to repel advanced process variation and support ultra-low power operation. Memories occupy more than 80% of the surface in today’s microdevices, and this trend is expected to continue. Metal oxide semiconductor field effect transis...

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Wedi'i Gadw mewn:
Manylion Llyfryddiaeth
Prif Awduron: M. V. Nageswara Rao, Mamidipaka Hema, Ramakrishna Raghutu, Ramakrishna S. S. Nuvvula, Polamarasetty P. Kumar, Ilhami Colak, Baseem Khan
Fformat: Artigo
Iaith:Inglês
Cyhoeddwyd: Wiley 2023-01-01
Cyfres:Journal of Electrical and Computer Engineering
Mynediad Ar-lein:http://dx.doi.org/10.1155/2023/7069746
Tagiau: Ychwanegu Tag
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