Low-latency hierarchical routing of reconfigurable neuromorphic systems

A reconfigurable hardware accelerator implementation for spiking neural network (SNN) simulation using field-programmable gate arrays (FPGAs) is promising and attractive research because massive parallelism results in better execution speed. For large-scale SNN simulations, a large number of FPGAs a...

Бүрэн тодорхойлолт

Номзүйн дэлгэрэнгүй

Үндсэн зохиолчид:	Samalika Perera, Ying Xu, André van Schaik, Runchun Wang
Формат:	Artigo
Хэл сонгох:	Inglês
Хэвлэсэн:	Frontiers Media S.A. 2025-02-01
Цуврал:	Frontiers in Neuroscience
Нөхцлүүд:	neuromorphic engineering FPGA acceleration multi-FPGA networks on chip transceivers SNN
Онлайн хандалт:	https://www.frontiersin.org/articles/10.3389/fnins.2025.1493623/full
Шошгууд:	Шошго нэмэх Шошго байхгүй, Энэхүү баримтыг шошголох эхний хүн болох!