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Efficient Synapse Memory Structure for Reconfigurable Digital Neuromorphic Hardware

Spiking Neural Networks (SNNs) have high potential to process information efficiently with binary spikes and time delay information. Recently, dedicated SNN hardware accelerators with on-chip synapse memory array are gaining interest in overcoming the limitations of running software-based SNN in con...

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Bibliografiset tiedot
Päätekijät: Jinseok Kim, Jongeun Koo, Taesu Kim, Jae-Joon Kim
Aineistotyyppi: Artigo
Kieli:Inglês
Julkaistu: Frontiers Media S.A. 2018-11-01
Sarja:Frontiers in Neuroscience
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Linkit:https://www.frontiersin.org/article/10.3389/fnins.2018.00829/full
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