Thermal-Electrical finite element analysis of nanometric copper vias under high fluence stress
This paper presents the development of a thermal-electrical finite element (FE) model with the objective to analyze failure mechanisms responsible of physical degradation (void, copper silicate formation, etc.) caused by high fluence stress of 90nm copper vias for FinfET devices. Indeed in [1], this...
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| 出版年: | Avances en Ciencias e Ingenierías |
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| 主要な著者: | , , , |
| フォーマット: | Artigo |
| 言語: | Inglês |
| 出版事項: |
Universidad San Francisco de Quito
2013
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| 主題: | |
| オンライン･アクセス: | https://www.redalyc.org/articulo.oa?id=726180836010 |
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