Electrical Parameters Extraction of CMOS Floating-Gate Inverters
This work provides an accurate methodology for extracting the floating-gate gain factory, of CMOS floating-gate inverters with a clock-driven switch for accessing temporarilly to the floating-gate. With the methodology proposed in this paper, the γ factor and other parasitic capacitances couple...
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| Publicat a: | Ingeniería. Investigación y Tecnología |
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| Autors principals: | , , , , |
| Format: | Artigo |
| Idioma: | Inglês |
| Publicat: |
Universidad Nacional Autónoma de México
2010
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| Matèries: | |
| Accés en línia: | https://www.redalyc.org/articulo.oa?id=40415987007 |
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