A Low-Complexity current-mode WTA circuit based on CMOS Quasi-FG Inverters

In this paper, a low-complexity current-mode Winner-Take-All circuit (WTA) of O (n) complexity with logical outputs is presented. The proposed approach employs a Quasi-FG Inverter as the key element for current integration and the computing of the winning cell. The design was implemented in a double...

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Vydáno v:Computación y Sistemas
Hlavní autoři: Jesús Ezequiel Molinar Solís, Luis Abraham Sánchez Gaspariano, Rodolfo Zolá García Lozano, Víctor Ponce Ponce, Juan J. Ocampo Hidalgo, Herón Molina Lozano, Alejandro Díaz Sánchez
Médium: Artigo
Jazyk:Inglês
Vydáno: Instituto Politécnico Nacional 2011
Témata:
Computación
all
take
Winner
neural networks
analog circuits
On-line přístup:https://www.redalyc.org/articulo.oa?id=61520765004
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