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Analysis of a Lateral Grain Boundary for Reducing Performance Variations in Poly-Si 1T-DRAM
A capacitorless one-transistor dynamic random-access memory device that uses a poly-silicon body (poly-Si 1T-DRAM) has been suggested to overcome the scaling limit of conventional one-transistor one-capacitor dynamic random-access memory (1T-1C DRAM). A poly-Si 1T-DRAM cell operates as a memory by u...
Wedi'i Gadw mewn:
| Cyhoeddwyd yn: | Micromachines (Basel) |
|---|---|
| Prif Awduron: | , , |
| Fformat: | Artigo |
| Iaith: | Inglês |
| Cyhoeddwyd: |
MDPI
2020
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| Pynciau: | |
| Mynediad Ar-lein: | https://ncbi.nlm.nih.gov/pmc/articles/PMC7690446/ https://ncbi.nlm.nih.gov/pubmed/33105643 https://ncbi.nlm.nih.govhttp://dx.doi.org/10.3390/mi11110952 |
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