Supervised Triple Macrosynchronized Lockstep (STMLS) Architecture for Multicore Processors
In various fields, such as those with high-reliability requirements, there is a growing demand for high-performance microprocessors. Whereas commercial microprocessors offer a good trade-off between cost, size, and performance, they often need to be adapted to meet the reliability demands of safety-...
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| Principais autores: | , , , |
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| Formato: | Artigo |
| Idioma: | Inglês |
| Publicado em: |
IEEE
2023-01-01
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| Colecção: | IEEE Access |
| Assuntos: | |
| Acesso em linha: | https://ieeexplore.ieee.org/document/10315116/ |
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