Design and Assessment of Hybrid MTJ/CMOS Circuits for In-Memory-Computation
Hybrid magnetic tunnel junction/complementary metal oxide semiconductor (MTJ/CMOS) circuits based on in-memory-computation (IMC) architecture is considered as the next-generation candidate for the digital integrated circuits. However, the energy consumption during the MTJ write process is a matter o...
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| Autors principals: | , , , |
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| Format: | Artigo |
| Idioma: | Inglês |
| Publicat: |
MDPI AG
2024-01-01
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| Col·lecció: | Journal of Low Power Electronics and Applications |
| Matèries: | |
| Accés en línia: | https://www.mdpi.com/2079-9268/14/1/3 |
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