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Simulation Study of the Double-Gate Tunnel Field-Effect Transistor with Step Channel Thickness
Double-gate tunnel field-effect transistor (DG TFET) is expected to extend the limitations of leakage current and subthreshold slope. However, it also suffers from the ambipolar behavior with the symmetrical source/drain architecture. To overcome the ambipolar current, asymmetry must be introduced b...
Wedi'i Gadw mewn:
| Cyhoeddwyd yn: | Nanoscale Res Lett |
|---|---|
| Prif Awduron: | , , , , |
| Fformat: | Artigo |
| Iaith: | Inglês |
| Cyhoeddwyd: |
Springer US
2020
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| Pynciau: | |
| Mynediad Ar-lein: | https://ncbi.nlm.nih.gov/pmc/articles/PMC7295927/ https://ncbi.nlm.nih.gov/pubmed/32542513 https://ncbi.nlm.nih.govhttp://dx.doi.org/10.1186/s11671-020-03360-7 |
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