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Effect of device design on charge offset drift in Si/SiO(2) single electron devices
We have measured the low-frequency time instability known as charge offset drift of Si/SiO(2) single electron devices (SEDs) with and without an overall poly-Si top gate. We find that SEDs with a poly-Si top gate have significantly less charge offset drift, exhibiting fewer isolated jumps and a fact...
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| 出版年: | J Appl Phys |
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| 主要な著者: | , , , , , |
| フォーマット: | Artigo |
| 言語: | Inglês |
| 出版事項: |
2018
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| 主題: | |
| オンライン･アクセス: | https://ncbi.nlm.nih.gov/pmc/articles/PMC6604639/ https://ncbi.nlm.nih.gov/pubmed/31274883 https://ncbi.nlm.nih.govhttp://dx.doi.org/10.1063/1.5048013 |
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