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Monolithic Low Noise and Low Zero-g Offset CMOS/MEMS Accelerometer Readout Scheme
A monolithic low noise and low zero-g offset CMOS/MEMS accelerometer and readout scheme in standard 0.18 μm CMOS mixed signal UMC process is presented. The low noise chopper architecture and telescopic topology is developed to achieve low noise. The experiments show noise floor is 421.70 μg/√Hz. The...
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| 出版年: | Micromachines (Basel) |
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| 主要な著者: | , |
| フォーマット: | Artigo |
| 言語: | Inglês |
| 出版事項: |
MDPI
2018
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| 主題: | |
| オンライン･アクセス: | https://ncbi.nlm.nih.gov/pmc/articles/PMC6315608/ https://ncbi.nlm.nih.gov/pubmed/30513614 https://ncbi.nlm.nih.govhttp://dx.doi.org/10.3390/mi9120637 |
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