Parallel Direct Digital Synthesis Architecture for Wideband Multi-GHz Chirp Generation

This paper presents generalized parallel-thread Direct Digital Synthesis (PDDS) architectures for high-frequency and wideband chirp signal generation that exceeds the nominal Nyquist limit imposed by the system clock in conventional single-thread Digital Direct Synthesis (DDS) implementations. An an...

Descripció completa

Dades bibliogràfiques

Autors principals:	Aditya Parikshit Khachane, Priyank Atri, Sonu Panchal, Kankan Deka, Ravi Saini, Govind Prasad
Format:	Artigo
Idioma:	Inglês
Publicat:	IEEE 2026-01-01
Col·lecció:	IEEE Access
Matèries:	Direct digital synthesis (DDS) chirp signal generation FPGA implementation parallel DDS architecture radar waveform generation wideband signal synthesis
Accés en línia:	https://ieeexplore.ieee.org/document/11613962/
Etiquetes:	Afegir etiqueta Sense etiquetes, Sigues el primer a etiquetar aquest registre!