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Structurally optimized SiC CMOS FinFET for high-temperature and low-power SoC logic integration

Abstract A high-temperature-operable binary inverter was designed through structural optimization of SiC-based CMOS FinFETs using 3D TCAD simulations. A FinFET architecture was incorporated into SiC CMOS with an optimized fin structure to overcome the critical challenges of high subthreshold swing (...

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Wedi'i Gadw mewn:
Manylion Llyfryddiaeth
Prif Awduron: Tae Seong Kwon, Young Jun Yoon, Do Yeon Park, Jong-Ho Bae, Young Suh Song, Hyoung Woo Kim, Jae Hwa Seo, Sung Yun Woo
Fformat: Artigo
Iaith:Inglês
Cyhoeddwyd: Nature Portfolio 2025-08-01
Cyfres:Scientific Reports
Pynciau:
Mynediad Ar-lein:https://doi.org/10.1038/s41598-025-14081-1
Tagiau: Ychwanegu Tag
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