A Novel Vertical Si TFET With Dual Doping-Less Tunneling Junction: A Simulation Study Including Trap-Related Non-Idealities
In this article, we propose a novel vertical TFET that benefits from dual doping-less tunneling junction. Due to the low on-state current of silicon-based TFETs, we employ a dual-source configuration and a high-k dielectric material in the oxide region. The performance assessment of our device is th...
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| Principais autores: | , |
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| Formato: | Artigo |
| Idioma: | Inglês |
| Publicado: |
IEEE
2023-01-01
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| Series: | IEEE Access |
| Assuntos: | |
| Acceso en liña: | https://ieeexplore.ieee.org/document/10210567/ |
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