Parallel Timing-driven Placement Algorithm for FPGA
Traditional timing-driven Field Programmable Gate Array(FPGA) placement algorithm has some degree of error when calculating timing cost.Some timing-driven algorithms achieve better placement quality with a sacrifice of time.To deal with this problem,this paper proposes a timing-driven parallel algor...
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| Autor principal: | |
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| Formato: | Artigo |
| Idioma: | Inglês |
| Publicado em: |
Editorial Office of Computer Engineering
2017-02-01
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| coleção: | Jisuanji gongcheng |
| Assuntos: | |
| Acesso em linha: | https://www.ecice06.com/fileup/1000-3428/PDF/201702017.pdf |
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