A 0.3 V Ultra-Low Power Hysteresis Comparator With SRAM-Based Output Stage and Its Application in Asynchronous Sigma-Delta Modulators
This work presents a novel hysteresis comparator for ultra-low voltage asynchronous sigma-delta modulators, featuring a regenerative bulk-based SRAM output stage that enables rail-to-rail operation and significantly improves speed through positive feedback. Nominal simulations on TSMC 180 nm technol...
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| Autori principali: | , , |
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| Natura: | Artigo |
| Lingua: | Inglês |
| Pubblicazione: |
IEEE
2025-01-01
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| Serie: | IEEE Access |
| Soggetti: | |
| Accesso online: | https://ieeexplore.ieee.org/document/11131185/ |
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