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A 0.3 V Ultra-Low Power Hysteresis Comparator With SRAM-Based Output Stage and Its Application in Asynchronous Sigma-Delta Modulators

This work presents a novel hysteresis comparator for ultra-low voltage asynchronous sigma-delta modulators, featuring a regenerative bulk-based SRAM output stage that enables rail-to-rail operation and significantly improves speed through positive feedback. Nominal simulations on TSMC 180 nm technol...

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Bibliographic Details
Main Authors: Riccardo Della Sala, Giovanni Nicolini, Giuseppe Scotti
Format: Artigo
Language:Inglês
Published: IEEE 2025-01-01
Series:IEEE Access
Subjects:
Online Access:https://ieeexplore.ieee.org/document/11131185/
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