Design and optimization of a quaternary booth multiplier in quaternary logic using carbon nanotube transistors
Abstract Employing the Booth algorithm to generate partial products and utilizing the Wallace tree method for compressing these products significantly enhance the speed of multipliers. Adopting quaternary logic can effectively reduce the number of operand and multiplier bits by half compared to bina...
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| Hauptverfasser: | , |
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| Format: | Artigo |
| Sprache: | Inglês |
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Nature Portfolio
2025-10-01
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| Schriftenreihe: | Scientific Reports |
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| Online-Zugang: | https://doi.org/10.1038/s41598-025-19704-1 |
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