A Low Cost VLSI Architecture for Spike Sorting Based on Feature Extraction with Peak Search
The goal of this paper is to present a novel VLSI architecture for spike sorting with high classification accuracy, low area costs and low power consumption. A novel feature extraction algorithm with low computational complexities is proposed for the design of the architecture. In the feature extrac...
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| Autors principals: | , , |
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| Format: | Artigo |
| Idioma: | Inglês |
| Publicat: |
MDPI AG
2016-12-01
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| Col·lecció: | Sensors |
| Matèries: | |
| Accés en línia: | http://www.mdpi.com/1424-8220/16/12/2084 |
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