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A New FPGA Architecture of FAST and BRIEF Algorithm for On-Board Corner Detection and Matching

Although some researchers have proposed the Field Programmable Gate Array (FPGA) architectures of Feature From Accelerated Segment Test (FAST) and Binary Robust Independent Elementary Features (BRIEF) algorithm, there is no consideration of image data storage in these traditional architectures that...

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Detalhes bibliográficos
Publicado no:Sensors (Basel)
Main Authors: Huang, Jingjin, Zhou, Guoqing, Zhou, Xiang, Zhang, Rongting
Formato: Artigo
Idioma:Inglês
Publicado em: MDPI 2018
Assuntos:
Acesso em linha:https://ncbi.nlm.nih.gov/pmc/articles/PMC5948726/
https://ncbi.nlm.nih.gov/pubmed/29597331
https://ncbi.nlm.nih.govhttp://dx.doi.org/10.3390/s18041014
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