Efficient Erase Operation by GIDL Current for 3D Structure FeFETs With Gate Stack Engineering and Compact Long-Term Retention Model
We have fabricated junctionless N-type silicon-on-insulator (SOI) ferroelectric-HfO<sub>2</sub> field effect transistors (FeFETs) with overlap and underlap structures between gate and drain/source regions to investigate the role of gate-induced-drain-leakage (GIDL) current in erase operation of FeFE...
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| Asıl Yazarlar: | , , , , , , , , |
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| Materyal Türü: | Artigo |
| Dil: | Inglês |
| Baskı/Yayın Bilgisi: |
IEEE
2022-01-01
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| Seri Bilgileri: | IEEE Journal of the Electron Devices Society |
| Konular: | |
| Online Erişim: | https://ieeexplore.ieee.org/document/9677031/ |
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