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Mitigation of Insulator Lightning-Induced Voltages by Installing Parallel Low-Voltage Surge Arresters

In this paper, we propose a mitigation method for reducing lightning-induced insulator voltages based on the installation of low-voltage surge arresters aligned parallelly to the insulator. The three-dimensional finite-difference time-domain (FDTD) method is applied to numerically model a real surge...

Ausführliche Beschreibung

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Bibliografische Detailangaben
Hauptverfasser: André M. de Morais, Rodrigo M. S. de Oliveira, Marcus V. A. Nunes
Format: Artigo
Sprache:Inglês
Veröffentlicht: MDPI AG 2023-01-01
Schriftenreihe:Energies
Schlagworte:
Online-Zugang:https://www.mdpi.com/1996-1073/16/3/1111
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