AHA: Design and Evaluation of Compute-Intensive Hardware Accelerators for AMD-Xilinx Zynq SoCs Using HLS IP Flow
The increasing complexity of algorithms in embedded applications has amplified the demand for high-performance computing. Heterogeneous embedded systems, particularly FPGA-based systems-on-chip (SoCs), enhance execution speed by integrating hardware accelerator intellectual property (IP) cores. Howe...
保存先:
| 主要な著者: | , |
|---|---|
| フォーマット: | Artigo |
| 言語: | Inglês |
| 出版事項: |
MDPI AG
2025-05-01
|
| シリーズ: | Computers |
| 主題: | |
| オンライン･アクセス: | https://www.mdpi.com/2073-431X/14/5/189 |
| タグ: |
タグなし, このレコードへの初めてのタグを付けませんか!
|