Fully Integrated GaN-on-Silicon Power-Rail ESD Clamp Circuit Without Transient Leakage Current During Normal Power-on Operation

When more circuit functions are integrated into a single chip fabricated by the GaN-on-Silicon process, the need for on-chip electrostatic discharge (ESD) protection design becomes crucial to safeguard GaN integrated circuits (ICs). In this work, the power-rail ESD clamp circuit with gate-coupled de...

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Автори:	Wei-Cheng Wang, Ming-Dou Ker
Формат:	Artigo
Мова:	Inglês
Опубліковано:	IEEE 2024-01-01
Серія:	IEEE Journal of the Electron Devices Society
Предмети:	Electrostatic discharge (ESD) transmission line pulse (TLP) human body model (HBM) GaN enhancement-mode HEMT (E-HEMT) power-rail ESD clamp circuit
Онлайн доступ:	https://ieeexplore.ieee.org/document/10681588/
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