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Benchmarking of FERAM-Based Memory System by Optimizing Ferroelectric Device Model

We present a framework for design technology co-optimization (DTCO) of the main memory system with one transistor-one capacitor (1T1C) ferroelectric random access memory (FERAM) as an alternative to dynamic random access memory (DRAM). We start with the ferroelectric capacitor device model and perfo...

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Hlavní autoři: Mohammad Adnaan, Saeideh Alinezhad Chamazcoti, Emil Karimov, Marie Garcia Bardon, Francky Catthoor, Jan van Houdt, Azad Naeemi
Médium: Artigo
Jazyk:Inglês
Vydáno: IEEE 2025-01-01
Edice:IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
Témata:
Dynamic random access memory (DRAM)
ferroelectric memory
ferroelectric random access memory (FERAM)
memory circuit
memory circuit benchmarking
nonvolatile memory
On-line přístup:https://ieeexplore.ieee.org/document/11195120/
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