Optimized Design in Current, Temperature and Stress Distributions for Paralleled Chips in Press-Pack IGBT Modules
In a press-pack insulated gate bipolar transistor (IGBT), a compact packaging structure forms a strong electromagnetic coupling, thermal coupling, and stress coupling, threatening current sharing, temperature sharing, and stress sharing of paralleled chips. Optimized layouts are proposed based on th...
Wedi'i Gadw mewn:
| Prif Awduron: | , , |
|---|---|
| Fformat: | Artigo |
| Iaith: | Inglês |
| Cyhoeddwyd: |
China electric power research institute
2025-01-01
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| Cyfres: | CSEE Journal of Power and Energy Systems |
| Pynciau: | |
| Mynediad Ar-lein: | https://ieeexplore.ieee.org/document/9862575/ |
| Tagiau: |
Dim Tagiau, Byddwch y cyntaf i dagio'r cofnod hwn!
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