Late-Stage Optimization of Modern ILP Processor Cores via FPGA Simulation
Late-stage (post-RTL implementation) optimization is important in achieving target performance for realistic processor design. However, several challenges remain for modern out-of-order ILP (instruction-level-parallelism) processors, such as simulation speed, flexibility, and complexity problems. Th...
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| Principais autores: | , , , , , , |
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| Formato: | Artigo |
| Idioma: | Inglês |
| Publicado em: |
MDPI AG
2022-11-01
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| coleção: | Applied Sciences |
| Assuntos: | |
| Acesso em linha: | https://www.mdpi.com/2076-3417/12/23/12225 |
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