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Implementation of FPGA based 32-bit RISC-V processor

This paper introduces the design and FPGA-based implementation of a compact and power-efficient 32-bit processor based on the RISC-V instruction set architecture, tailored for resource-constrained embedded systems. The processor features a simplified 4-stage pipeline that reduces hardware complexity...

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Principais autores: Kamer Kırali, Can Bülent Fidan
Format: Artigo
Sprog:Inglês
Udgivet: Elsevier 2025-10-01
Serier:Engineering Science and Technology, an International Journal
Fag:
FPGA
Verilog
RISC-V
ISA
Digital design
Computer architecture
Online adgang:http://www.sciencedirect.com/science/article/pii/S2215098625001946
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