Implementation of FPGA based 32-bit RISC-V processor
This paper introduces the design and FPGA-based implementation of a compact and power-efficient 32-bit processor based on the RISC-V instruction set architecture, tailored for resource-constrained embedded systems. The processor features a simplified 4-stage pipeline that reduces hardware complexity...
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| Autori principali: | , |
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| Natura: | Artigo |
| Lingua: | Inglês |
| Pubblicazione: |
Elsevier
2025-10-01
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| Serie: | Engineering Science and Technology, an International Journal |
| Soggetti: | |
| Accesso online: | http://www.sciencedirect.com/science/article/pii/S2215098625001946 |
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