Design of Capacitorless DRAM Based on Polycrystalline Silicon Nanotube Structure

In this study, a capacitorless one-transistor dynamic random-access memory (1T-DRAM) based on a polycrystalline silicon nanotube structure with a grain boundary (GB) is designed and analyzed using technology computer-aided design (TCAD) simulation. The proposed 1T-DRAM has the improved electrical pe...

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Detalhes bibliográficos

Principais autores:	Jin Park, Min Su Cho, Sang Ho Lee, Hee Dae An, So Ra Min, Geon Uk Kim, Young Jun Yoon, Jae Hwa Seo, Sin-Hyung Lee, Jaewon Jang, Jin-Hyuk Bae, In Man Kang
Formato:	Artigo
Idioma:	Inglês
Publicado em:	IEEE 2021-01-01
coleção:	IEEE Access
Assuntos:	Polycrystalline silicon one-transistor dynamic random-access memory grain boundary nanotube metal–oxide–semiconductor field-effect transistor dual-gate
Acesso em linha:	https://ieeexplore.ieee.org/document/9641815/
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