Soft Error-Tolerant and Highly Stable Low-Power SRAM for Satellite Applications

As CMOS technology has advanced, the transistor integration density of static random-access memory (SRAM) cells has increased. This has led to a reduction in the critical charge of sensitive nodes, making the SRAM cells more susceptible to soft errors. When high-energy particles in space strike the...

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Autors principals:	Jong-Yeob Oh, Sung-Hun Jo
Format:	Artigo
Idioma:	Inglês
Publicat:	MDPI AG 2025-01-01
Col·lecció:	Applied Sciences
Matèries:	critical charge low-power read stability satellite applications single-event multi-node upsets (SEMNUs) single-event upset (SEU)
Accés en línia:	https://www.mdpi.com/2076-3417/15/1/375
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