Hybrid Digital/Analog Predistorter Architecture With Enhanced Robustness to Hardware Impairments
In this paper, a hybrid predistortion architecture that allies the benefits of digital and analog predistortion techniques is investigated. This Hybrid Digital/Analog Predistorter (H-DAPD) uses a low order memory polynomial as a baseband digital predistortion function. To alleviate the complexity of...
Furkejuvvon:
| Váldodahkkit: | , |
|---|---|
| Materiálatiipa: | Artigo |
| Giella: | Inglês |
| Almmustuhtton: |
IEEE
2024-01-01
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| Ráidu: | IEEE Access |
| Fáttát: | |
| Liŋkkat: | https://ieeexplore.ieee.org/document/10636135/ |
| Fáddágilkorat: |
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