QR-koodi

FPGA Implementation of the Frequency Scaling Algorithm for Real-Time SAR Imaging

This paper presents a field-programmable gate array (FPGA)-based hardware accelerator for the frequency scaling algorithm (FSA) targeting real-time onboard synthetic aperture radar (SAR) imaging. System performance is typically bottlenecked by repeated dynamic random-access memory (DRAM) accesses du...

Täydet tiedot

Tallennettuna:
Bibliografiset tiedot
Päätekijät: Dongmin Jeong, Chulho Jung, Kwangseok Choi, Yongchul Jung, Sungho Lee, Yunho Jung
Aineistotyyppi: Artigo
Kieli:Inglês
Julkaistu: IEEE 2026-01-01
Sarja:IEEE Access
Aiheet:
Linkit:https://ieeexplore.ieee.org/document/11527192/
Tagit: Lisää tagi
Ei tageja, Lisää ensimmäinen tagi!