FPGA Implementation of the Frequency Scaling Algorithm for Real-Time SAR Imaging
This paper presents a field-programmable gate array (FPGA)-based hardware accelerator for the frequency scaling algorithm (FSA) targeting real-time onboard synthetic aperture radar (SAR) imaging. System performance is typically bottlenecked by repeated dynamic random-access memory (DRAM) accesses du...
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| Hlavní autoři: | , , , , , |
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| Médium: | Artigo |
| Jazyk: | Inglês |
| Vydáno: |
IEEE
2026-01-01
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| Edice: | IEEE Access |
| Témata: | |
| On-line přístup: | https://ieeexplore.ieee.org/document/11527192/ |
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