Improved Low Power FPGA Binding of Datapaths from Data Flow Graphs with NSGA II -based Schedule Selection

FPGAs are increasingly being used to implement data path intensive algorithms for signal processing and image processing applications. In High Level Synthesis of Data Flow Graphs targeted at FPGAs, the effect of interconnect resources such as multiplexers must be considered since they contribute...

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Detalhes bibliográficos

Principais autores:	BHUVANESWARI, M. C., RAM, D. S. H., UMADEVI, S.
Formato:	Artigo
Idioma:	Inglês
Publicado em:	Stefan cel Mare University of Suceava 2013-11-01
coleção:	Advances in Electrical and Computer Engineering
Assuntos:	high level synthesis field programmable gate arrays power dissipation genetic algorithms reconfigurable logic
Acesso em linha:	http://dx.doi.org/10.4316/AECE.2013.04015
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