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Leakage in nanometer CMOS technologies
Scaling transistors into the nanometer regime has resulted in a dramatic increase in MOS leakage (i.e., off-state) current. Threshold voltages of transistors have scaled to maintain performance at reduced power supply voltages. Leakage current has become a major portion of the total power consumptio...
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| Main Authors: | , |
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| Formato: | Livro |
| Idioma: | Inglês |
| Publicado: |
Springer US,
2006
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| Edición: | 1st ed. 2006. |
| Series: | Integrated Circuits and Systems, |
| Assuntos: | |
| Acceso en liña: | https://minerva.ufrj.br/F/?func=direct&doc_number=000894755&local_base=UFR01 |
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