Verification methodology manual for SystemVerilog

Functional verification remains one of the single biggest challenges in the development of complex system-on-chip (SoC) devices. Despite the introduction of successive new technologies, the gap between design capability and verification confidence continues to widen. The biggest problem is that thes...

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Main Authors: Bergeron, Janick., Cerny, Eduard., Hunter, Alan., Nightingale, Andy.
Format: Livro
Jezik:Inglês
Izdano: Springer US, 2006
Izdaja:1st ed. 2006.
Teme:
Circuitos eletrônicos.
Conjunto de caracteres (Processamento de dados).
Engenharia auxiliada por computador.
Eletrônica.
Microeletrônica.
Engenharia elétrica.
Online dostop:https://minerva.ufrj.br/F/?func=direct&doc_number=000894632&local_base=UFR01
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