CIRCUIT IMPLEMENTATION OF VHDL-DESCRIPTIONS OF SYSTEMS OF PARTIAL BOOLEAN FUNCTIONS

Por P. N. Bibilo
Publicado em 2016-09-01

MINIMIZING THE MULTILEVEL REPRESENTATIONS OF SYSTEMS OF BOOLEAN FUNCTIONS BASED ON SHANNON DECOMPOSITION

Por P. N. Bibilo, Y. Y. Lankevich
Publicado em 2017-06-01

EMPLOYING COMPLEXITY ESTIMATES OF BINARY DECISION DIAGRAMS IN THE SYNTHESIS OF LOGICAL CIRCUITS

Por N. A. Avdeev, P. N. Bibilo
Publicado em 2016-09-01

The search for subsystems of related functions from multilevel representation of systems of Boolean functions1

Por P. N. Bibilo, A. M. Pazniak
Publicado em 2020-03-01

Logical optimization of Boolean nets using Shannon expansion

Por P. N. Bibilo, Yu. Y. Lankevich
Publicado em 2019-06-01

Minimization of binary decision diagrams for systems of completely defined Boolean functions using Shannon expansions and algebraic representations of cofactors

Por P. N. Bibilo, V. I. Romanov
Publicado em 2021-07-01

ON SCIENCE HERITAGE OF CORRESPONDING MEMBER А.D. ZAKREVSKIJ

Por P. N. Bibilo, Yu. V. Pottosin, L. D. Cheremisinova
Publicado em 2017-03-01

Logical optimization the multilevel representations of systems of Boolean functions based on partitioning into blocksand Shannon decomposition

Por P. N. Bibilo, N. A. Kirienko, Y. Y. Lankevich
Publicado em 2018-09-01

Logical minimization for combinatorial structure in FPGA

Por P. N. Bibilo, Yu. Yu. Lankevich, V. I. Romanov
Publicado em 2021-03-01