Memory Disambiguation Hardware: a Review
One of the main challenges of modern processor designs is the implementation of scalable and efficient mechanisms to detect memory access order violations as a result of out-of-order execution. Conventional structures performing this task are complex, inefficient and power-hungry. This fact has gene...
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| Publicado no: | Journal of Computer Science and Technology |
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| Principais autores: | , , , , |
| Formato: | Artigo |
| Idioma: | Inglês |
| Publicado em: |
Universidad Nacional de La Plata
2008
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| Assuntos: | |
| Acesso em linha: | https://www.redalyc.org/articulo.oa?id=638067318005 |
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