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Speeding up Quantified Bit-Vector SMT Solvers by Bit-Width Reductions and Extensions

Recent experiments have shown that satisfiability of a quantified bit-vector formula coming from practical applications almost never changes after reducing all bit-widths in the formula to a small number of bits. This paper proposes a novel technique based on this observation. Roughly speaking, a gi...

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Detalhes bibliográficos
Publicado no:Theory and Applications of Satisfiability Testing – SAT 2020
Main Authors: Jonáš, Martin, Strejček, Jan
Formato: Artigo
Idioma:Inglês
Publicado em: 2020
Assuntos:
Acesso em linha:https://ncbi.nlm.nih.gov/pmc/articles/PMC7326550/
https://ncbi.nlm.nih.govhttp://dx.doi.org/10.1007/978-3-030-51825-7_27
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