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An Efficient Hardware Circuit for Spike Sorting Based on Competitive Learning Networks

This study aims to present an effective VLSI circuit for multi-channel spike sorting. The circuit supports the spike detection, feature extraction and classification operations. The detection circuit is implemented in accordance with the nonlinear energy operator algorithm. Both the peak detection a...

詳細記述

保存先:
書誌詳細
出版年:Sensors (Basel)
主要な著者: Chen, Huan-Yuan, Chen, Chih-Chang, Hwang, Wen-Jyi
フォーマット: Artigo
言語:Inglês
出版事項: MDPI 2017
主題:
オンライン・アクセス:https://ncbi.nlm.nih.gov/pmc/articles/PMC5677424/
https://ncbi.nlm.nih.gov/pubmed/28956859
https://ncbi.nlm.nih.govhttp://dx.doi.org/10.3390/s17102232
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