Li, W., Liu, H., Wang, S., Chen, S., & Yang, Z. (2017). Design of High Performance Si/SiGe Heterojunction Tunneling FETs with a T-Shaped Gate. Nanoscale Res Lett.
Citação norma ChicagoLi, Wei, Hongxia Liu, Shulong Wang, Shupeng Chen, and Zhaonian Yang. "Design of High Performance Si/SiGe Heterojunction Tunneling FETs With a T-Shaped Gate." Nanoscale Res Lett 2017.
MLA CitationLi, Wei, et al. "Design of High Performance Si/SiGe Heterojunction Tunneling FETs With a T-Shaped Gate." Nanoscale Res Lett 2017.
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