Li, W., Liu, H., Wang, S., Chen, S., & Yang, Z. (2017). Design of High Performance Si/SiGe Heterojunction Tunneling FETs with a T-Shaped Gate. Nanoscale Res Lett.
Chicago Style CitationLi, Wei, Hongxia Liu, Shulong Wang, Shupeng Chen, i Zhaonian Yang. "Design of High Performance Si/SiGe Heterojunction Tunneling FETs With a T-Shaped Gate." Nanoscale Res Lett 2017.
Cita MLALi, Wei, et al. "Design of High Performance Si/SiGe Heterojunction Tunneling FETs With a T-Shaped Gate." Nanoscale Res Lett 2017.
Atenció: Aquestes cites poden no estar 100% correctes.