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A Low Cost VLSI Architecture for Spike Sorting Based on Feature Extraction with Peak Search
The goal of this paper is to present a novel VLSI architecture for spike sorting with high classification accuracy, low area costs and low power consumption. A novel feature extraction algorithm with low computational complexities is proposed for the design of the architecture. In the feature extrac...
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| 發表在: | Sensors (Basel) |
|---|---|
| Main Authors: | , , |
| 格式: | Artigo |
| 語言: | Inglês |
| 出版: |
MDPI
2016
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| 主題: | |
| 在線閱讀: | https://ncbi.nlm.nih.gov/pmc/articles/PMC5191065/ https://ncbi.nlm.nih.gov/pubmed/27941631 https://ncbi.nlm.nih.govhttp://dx.doi.org/10.3390/s16122084 |
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