ロード中...
Efficient BinDCT hardware architecture exploration and implementation on FPGA
This paper presents a hardware module design for the forward Binary Discrete Cosine Transform (BinDCT) and its implementation on a field programmable gate array device. Different architectures of the BinDCT module were explored to ensure the maximum efficiency. The elaboration of these architectures...
保存先:
| 出版年: | J Adv Res |
|---|---|
| 主要な著者: | , , , |
| フォーマット: | Artigo |
| 言語: | Inglês |
| 出版事項: |
Elsevier
2016
|
| 主題: | |
| オンライン･アクセス: | https://ncbi.nlm.nih.gov/pmc/articles/PMC5037209/ https://ncbi.nlm.nih.gov/pubmed/27699066 https://ncbi.nlm.nih.govhttp://dx.doi.org/10.1016/j.jare.2016.09.002 |
| タグ: |
タグ追加
タグなし, このレコードへの初めてのタグを付けませんか!
|